Abstract: Ka sidelobes are often blamed on array geometry or tapering, but in LEO user terminals the quiet culprit is phase shifter quantisation. This article links phase-bit resolution to sidelobe growth, scan-dependent artefacts, and compliance risk, then lays out practical mitigation paths—from mixed-resolution architectures and calibration to tapering choices that actually survive hardware constraints.
Ka sidelobes are rarely a “nice-to-have” problem in LEO user terminals. They translate directly into interference risk, tighter EIRP limits, harder conformance testing, and—at worst—links that look fine on a boresight plot but misbehave during tracking when the beam is scanning and the handset is heating up. If you are building an electronically steered Ka-band array for mobility, phase shifter quantisation is one of the first places to look when sidelobes refuse to stay where the simulation said they would.
Why Ka sidelobes bite harder in LEO terminals
At Ka-band, everything is unforgiving: wavelength is small, array apertures are electrically large, and scan angles are aggressive because the satellite does not sit politely on a geostationary arc—it races through the sky. That combination amplifies three practical realities:
- LEO tracking means constant scanning. Your sidelobe “worst case” is not a single angle; it is a trajectory. A pattern that passes at 0° can fail at 50–60° once scan loss and element-pattern distortion kick in.
- Interference expectations are tightening. The industry push toward standardised non-terrestrial connectivity (for example the 3GPP NTN work in Release 17, including TS 38.101-5 for UE RF requirements) is bringing more formal scrutiny to radiated performance and coexistence. Even if your terminal is not a 3GPP UE, the direction of travel is clear: predictable radiation behaviour matters.
- Flat-panel ESAs are going mainstream. The surge in flat-panel electronically steered antennas for SATCOM-on-the-move and multi-orbit use is driving competitive pressure on cost, size and power. That pressure often shows up as lower phase resolution, coarser control, or architecture compromises—all of which surface as sidelobe issues.
Phase shifter quantisation 101: what the bits do to the beam
A B-bit phase shifter gives you a finite set of phase states. The phase step is:
Δ = 360° / 2B
When you ask the array for an “ideal” progressive phase, each element is rounded to the nearest available state, leaving a quantisation error. If that error is approximately uniformly distributed between −Δ/2 and +Δ/2, a useful first-order metric is the RMS phase error:
σφ ≈ Δ / √12
From an array-factor perspective, those element phase errors act like a mixture of (a) coherent beam steering that you wanted and (b) incoherent energy that smears into sidelobes. Two outcomes matter most for Ka-band LEO terminals:
Main beam degradation: reduced peak gain and slightly widened beam (more painful at high scan where you are already fighting scan loss).
Sidelobe growth and artefacts: elevated average sidelobe floor plus discrete “quantisation lobes” that can appear as stubborn peaks at certain scan angles, particularly when the rounding pattern becomes spatially periodic across the aperture.
Rule-of-thumb bit depth for Ka-band ESAs
There is no single magic number because it depends on aperture size, tapering, scan range, and element pattern. But experience across practical ESAs is consistent:
2–3 bits: fast, cheap, and often unacceptable for sidelobes across wide scan—quantisation lobes become hard to suppress with taper alone.
4 bits: can be workable in some architectures, especially with good calibration and careful sidelobe control, but you are living close to the edge for stringent masks.
5–6 bits: typically the “comfort zone” for sidelobe performance, assuming amplitude/phase calibration is credible and the array is not suffering additional large random errors.
The uncomfortable truth: if your product plan assumes “we’ll fix it in beamforming software later”, low phase resolution is one of the few hardware choices that software cannot fully redeem.
Ka sidelobes under quantisation: what actually shows up in the chamber
Designers often expect quantisation to look like a mild increase in the sidelobe floor. In real Ka-band terminals it is usually messier, because quantisation stacks with other non-idealities that are scan- and temperature-dependent.
Discrete peaks that move with scan angle. The rounding of phase commands can form repeating phase patterns across the array. When that pattern is quasi-periodic, it behaves like an unintended sub-array and produces a lobe that is not predicted by a “random error” model.
Asymmetric sidelobes. Real phase shifters have state-dependent insertion loss and group delay. When you quantise aggressively, you use fewer states, so the loss/delay non-uniformities become more correlated—and the pattern skews.
Polarisation and element-pattern coupling. At Ka-band, element patterns vary with scan and polarisation; the array factor is not the whole story. Quantisation error can push energy into directions where the element is not well-behaved, lifting sidelobes unevenly across azimuth/elevation.
Thermal drift looks like “mystery sidelobes”. Ka-band front-ends are thermally active. As the terminal heats, phase and gain drift, and a low-bit system has less margin to compensate. You see this during long tracking runs: sidelobes climb even though your commanded weights are unchanged.
Ka sidelobes mitigation options (and the trade-offs you can’t ignore)
The good news is that you have more levers than “increase bit depth”. The bad news is each lever shifts cost, complexity, or efficiency somewhere else.
1) Mixed-resolution architectures
Recent research and product architectures are increasingly pragmatic: not every control point needs the same number of bits. Mixed-resolution phase shifter approaches allocate higher resolution where it buys the most sidelobe improvement (often near the centre of the aperture or in critical sub-arrays), and lower resolution elsewhere. The objective is not academic elegance; it is bill-of-materials sanity without surrendering sidelobe compliance.
For LEO user terminals, mixed-resolution can be particularly effective when paired with:
Sub-arraying: high-resolution at sub-array combining, lower resolution at element level.
Hybrid beamforming: analogue steering plus limited digital correction to “scrub” the worst sidelobes.
2) Dither and state scheduling (making quantisation less coherent)
If quantisation error becomes periodic, you get discrete lobes. One mitigation is to intentionally decorrelate the rounding pattern—think of it as spreading the error energy so it raises a floor rather than creating a spike. This can be done with controlled dither, state scheduling, or optimisation routines that choose among near-equivalent phase states to minimise peak sidelobes rather than minimise per-element phase error.
This is not free: some methods increase switching activity (power) or complicate verification because your pattern becomes time-varying.
3) Amplitude tapering that is realistic in hardware
Textbook tapers (Taylor, Chebyshev, etc.) assume continuous amplitude control. Real Ka-band ESAs often have limited gain control resolution, state-dependent loss, and a desire to run PAs efficiently. The trick is to choose a taper strategy that aligns with hardware constraints:
Coarse, piecewise tapers that your gain control can actually implement repeatably.
Efficiency-aware tapers that do not force half the aperture to run “backed-off” all the time, which can be brutal for thermal design.
4) Calibration, calibration, calibration
Quantisation sets a floor, but drift and mismatch determine whether you crash through it. Ka-band arrays need a calibration concept that matches the use-case:
Factory calibration: correct fixed phase/gain offsets, state-dependent insertion loss, and element-to-element variation.
In-field/self calibration: track temperature-induced drift and ageing. If you cannot measure it, you cannot correct it, and sidelobes will wander.
For LEO tracking, calibration should be validated across scan, temperature, and frequency—not just at a single “hero” condition.
5) True time delay (TTD) where it matters
Wideband Ka links and large scan angles can expose beam squint if you rely purely on phase shifting. TTD is heavier and more expensive, but strategically placing delay elements (for example at sub-array level) can reduce squint-driven sidelobe anomalies across bandwidth—particularly relevant when terminals need to operate across wide channel allocations or multi-orbit scenarios.
Industry direction: why sidelobe control is becoming a product requirement, not a lab nicety
Two recent trends are pushing sidelobe control into the “must ship” category:
Standardisation and interoperability pressure. 3GPP NTN (Release 17 onwards) is formalising satellite-access RF expectations. Even outside 3GPP, procurement teams are increasingly writing sidelobe and off-axis limits into acceptance criteria because interference is a programme risk.
Ka-band is underpinning headline demos and real deployments. High-profile Ka-band NTN demonstrations—such as ESA and Telesat’s 5G NTN connectivity milestone reported in late 2024—signal where the ecosystem is going: more terminals, more beams, more density. In that environment, sidelobes are not just your problem; they are everyone’s problem, and regulators notice.
The practical implication for phased-array designers: assume your terminal will be judged on its behaviour in a crowded sky, not just its peak gain.
Where Novocomms Space fits: turning sidelobe theory into a terminal that ships
At Novocomms Space we work with Ka-band (as well as Ku- and L-band) antenna and terminal programmes where the difference between a good plot and a robust product is the unglamorous engineering: quantisation choices, calibration strategy, thermal reality, and test coverage.
Typical ways we support Ka-band ESA teams include:
Architecture trade studies: bit depth vs DC power vs cost, including mixed-resolution options and hybrid beamforming partitions.
Beamforming and sidelobe optimisation: weight design that targets peak sidelobe constraints across scan, not just at boresight.
RF and antenna co-design: accounting for state-dependent loss, PA compression behaviour, and element-pattern impacts on sidelobes.
Verification planning: defining a test matrix that catches scan- and temperature-driven sidelobe growth early—before it becomes a late-stage compliance surprise.
Conclusion: treat phase quantisation as a sidelobe budget item
Phase shifter quantisation is not a minor implementation detail; it is a primary driver of Ka sidelobes in practical LEO user terminals, especially under wide scan and real thermal conditions. If you design your sidelobe mask assuming continuous phase, you will end up paying for it later in calibration complexity, retuned tapers, or a hardware respin.
Build a sidelobe budget the same way you build a noise figure budget: allocate error to quantisation, drift, amplitude mismatch, and element-pattern uncertainty. Then pick an architecture—bit depth, mixed-resolution, calibration approach—that can meet the requirement across scan, frequency and temperature.
If you are wrestling with Ka-band sidelobe compliance or phase-bit trade-offs in a LEO terminal, speak to Novocomms Space. Contact us at https://novocomms.space/contact-us/.